WARNING:tensorflow:From D:\DocumentsDDrive\Installed_Files\Anaconda3\envs\tf-gpu\lib\site-packages\tensorflow\python\keras\initializers.py:104: calling VarianceScaling.__init__ (from tensorflow.python.ops.init_ops) with distribution=normal is deprecated and will be removed in a future version.
Instructions for updating:
`normal` is a deprecated alias for `truncated_normal`
__________________________________________________________________________________________________
Layer (type) Output Shape Param # Connected to
==================================================================================================
input_1 (InputLayer) (None, 96, 96, 3) 0
__________________________________________________________________________________________________
Inpt_conv (Conv2D) (None, 96, 96, 16) 448 input_1[0][0]
__________________________________________________________________________________________________
Inpt_bn (BatchNormalization) (None, 96, 96, 16) 64 Inpt_conv[0][0]
__________________________________________________________________________________________________
Inpt_relu (Activation) (None, 96, 96, 16) 0 Inpt_bn[0][0]
__________________________________________________________________________________________________
Stg1_Blk1_Res1_conv (Conv2D) (None, 96, 96, 16) 2320 Inpt_relu[0][0]
__________________________________________________________________________________________________
Stg1_Blk1_Res1_bn (BatchNormali (None, 96, 96, 16) 64 Stg1_Blk1_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg1_Blk1_Res1_relu (Activation (None, 96, 96, 16) 0 Stg1_Blk1_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg1_Blk1_Res2_conv (Conv2D) (None, 96, 96, 16) 2320 Stg1_Blk1_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg1_Blk1_Res2_bn (BatchNormali (None, 96, 96, 16) 64 Stg1_Blk1_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg1_Blk1_add (Add) (None, 96, 96, 16) 0 Inpt_relu[0][0]
Stg1_Blk1_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg1_Blk1_relu (Activation) (None, 96, 96, 16) 0 Stg1_Blk1_add[0][0]
__________________________________________________________________________________________________
Stg1_Blk2_Res1_conv (Conv2D) (None, 96, 96, 16) 2320 Stg1_Blk1_relu[0][0]
__________________________________________________________________________________________________
Stg1_Blk2_Res1_bn (BatchNormali (None, 96, 96, 16) 64 Stg1_Blk2_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg1_Blk2_Res1_relu (Activation (None, 96, 96, 16) 0 Stg1_Blk2_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg1_Blk2_Res2_conv (Conv2D) (None, 96, 96, 16) 2320 Stg1_Blk2_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg1_Blk2_Res2_bn (BatchNormali (None, 96, 96, 16) 64 Stg1_Blk2_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg1_Blk2_add (Add) (None, 96, 96, 16) 0 Stg1_Blk1_relu[0][0]
Stg1_Blk2_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg1_Blk2_relu (Activation) (None, 96, 96, 16) 0 Stg1_Blk2_add[0][0]
__________________________________________________________________________________________________
Stg1_Blk3_Res1_conv (Conv2D) (None, 96, 96, 16) 2320 Stg1_Blk2_relu[0][0]
__________________________________________________________________________________________________
Stg1_Blk3_Res1_bn (BatchNormali (None, 96, 96, 16) 64 Stg1_Blk3_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg1_Blk3_Res1_relu (Activation (None, 96, 96, 16) 0 Stg1_Blk3_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg1_Blk3_Res2_conv (Conv2D) (None, 96, 96, 16) 2320 Stg1_Blk3_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg1_Blk3_Res2_bn (BatchNormali (None, 96, 96, 16) 64 Stg1_Blk3_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg1_Blk3_add (Add) (None, 96, 96, 16) 0 Stg1_Blk2_relu[0][0]
Stg1_Blk3_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg1_Blk3_relu (Activation) (None, 96, 96, 16) 0 Stg1_Blk3_add[0][0]
__________________________________________________________________________________________________
dropout (Dropout) (None, 96, 96, 16) 0 Stg1_Blk3_relu[0][0]
__________________________________________________________________________________________________
Stg2_Blk1_Res1_conv (Conv2D) (None, 48, 48, 32) 4640 dropout[0][0]
__________________________________________________________________________________________________
Stg2_Blk1_Res1_bn (BatchNormali (None, 48, 48, 32) 128 Stg2_Blk1_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg2_Blk1_Res1_relu (Activation (None, 48, 48, 32) 0 Stg2_Blk1_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg2_Blk1_Res2_conv (Conv2D) (None, 48, 48, 32) 9248 Stg2_Blk1_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg2_Blk1_lin_conv (Conv2D) (None, 48, 48, 32) 544 dropout[0][0]
__________________________________________________________________________________________________
Stg2_Blk1_Res2_bn (BatchNormali (None, 48, 48, 32) 128 Stg2_Blk1_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg2_Blk1_add (Add) (None, 48, 48, 32) 0 Stg2_Blk1_lin_conv[0][0]
Stg2_Blk1_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg2_Blk1_relu (Activation) (None, 48, 48, 32) 0 Stg2_Blk1_add[0][0]
__________________________________________________________________________________________________
Stg2_Blk2_Res1_conv (Conv2D) (None, 48, 48, 32) 9248 Stg2_Blk1_relu[0][0]
__________________________________________________________________________________________________
Stg2_Blk2_Res1_bn (BatchNormali (None, 48, 48, 32) 128 Stg2_Blk2_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg2_Blk2_Res1_relu (Activation (None, 48, 48, 32) 0 Stg2_Blk2_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg2_Blk2_Res2_conv (Conv2D) (None, 48, 48, 32) 9248 Stg2_Blk2_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg2_Blk2_Res2_bn (BatchNormali (None, 48, 48, 32) 128 Stg2_Blk2_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg2_Blk2_add (Add) (None, 48, 48, 32) 0 Stg2_Blk1_relu[0][0]
Stg2_Blk2_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg2_Blk2_relu (Activation) (None, 48, 48, 32) 0 Stg2_Blk2_add[0][0]
__________________________________________________________________________________________________
Stg2_Blk3_Res1_conv (Conv2D) (None, 48, 48, 32) 9248 Stg2_Blk2_relu[0][0]
__________________________________________________________________________________________________
Stg2_Blk3_Res1_bn (BatchNormali (None, 48, 48, 32) 128 Stg2_Blk3_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg2_Blk3_Res1_relu (Activation (None, 48, 48, 32) 0 Stg2_Blk3_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg2_Blk3_Res2_conv (Conv2D) (None, 48, 48, 32) 9248 Stg2_Blk3_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg2_Blk3_Res2_bn (BatchNormali (None, 48, 48, 32) 128 Stg2_Blk3_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg2_Blk3_add (Add) (None, 48, 48, 32) 0 Stg2_Blk2_relu[0][0]
Stg2_Blk3_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg2_Blk3_relu (Activation) (None, 48, 48, 32) 0 Stg2_Blk3_add[0][0]
__________________________________________________________________________________________________
dropout_1 (Dropout) (None, 48, 48, 32) 0 Stg2_Blk3_relu[0][0]
__________________________________________________________________________________________________
Stg3_Blk1_Res1_conv (Conv2D) (None, 24, 24, 64) 18496 dropout_1[0][0]
__________________________________________________________________________________________________
Stg3_Blk1_Res1_bn (BatchNormali (None, 24, 24, 64) 256 Stg3_Blk1_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg3_Blk1_Res1_relu (Activation (None, 24, 24, 64) 0 Stg3_Blk1_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg3_Blk1_Res2_conv (Conv2D) (None, 24, 24, 64) 36928 Stg3_Blk1_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg3_Blk1_lin_conv (Conv2D) (None, 24, 24, 64) 2112 dropout_1[0][0]
__________________________________________________________________________________________________
Stg3_Blk1_Res2_bn (BatchNormali (None, 24, 24, 64) 256 Stg3_Blk1_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg3_Blk1_add (Add) (None, 24, 24, 64) 0 Stg3_Blk1_lin_conv[0][0]
Stg3_Blk1_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg3_Blk1_relu (Activation) (None, 24, 24, 64) 0 Stg3_Blk1_add[0][0]
__________________________________________________________________________________________________
Stg3_Blk2_Res1_conv (Conv2D) (None, 24, 24, 64) 36928 Stg3_Blk1_relu[0][0]
__________________________________________________________________________________________________
Stg3_Blk2_Res1_bn (BatchNormali (None, 24, 24, 64) 256 Stg3_Blk2_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg3_Blk2_Res1_relu (Activation (None, 24, 24, 64) 0 Stg3_Blk2_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg3_Blk2_Res2_conv (Conv2D) (None, 24, 24, 64) 36928 Stg3_Blk2_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg3_Blk2_Res2_bn (BatchNormali (None, 24, 24, 64) 256 Stg3_Blk2_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg3_Blk2_add (Add) (None, 24, 24, 64) 0 Stg3_Blk1_relu[0][0]
Stg3_Blk2_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg3_Blk2_relu (Activation) (None, 24, 24, 64) 0 Stg3_Blk2_add[0][0]
__________________________________________________________________________________________________
Stg3_Blk3_Res1_conv (Conv2D) (None, 24, 24, 64) 36928 Stg3_Blk2_relu[0][0]
__________________________________________________________________________________________________
Stg3_Blk3_Res1_bn (BatchNormali (None, 24, 24, 64) 256 Stg3_Blk3_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg3_Blk3_Res1_relu (Activation (None, 24, 24, 64) 0 Stg3_Blk3_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg3_Blk3_Res2_conv (Conv2D) (None, 24, 24, 64) 36928 Stg3_Blk3_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg3_Blk3_Res2_bn (BatchNormali (None, 24, 24, 64) 256 Stg3_Blk3_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg3_Blk3_add (Add) (None, 24, 24, 64) 0 Stg3_Blk2_relu[0][0]
Stg3_Blk3_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg3_Blk3_relu (Activation) (None, 24, 24, 64) 0 Stg3_Blk3_add[0][0]
__________________________________________________________________________________________________
dropout_2 (Dropout) (None, 24, 24, 64) 0 Stg3_Blk3_relu[0][0]
__________________________________________________________________________________________________
Stg4_Blk1_Res1_conv (Conv2D) (None, 12, 12, 128) 73856 dropout_2[0][0]
__________________________________________________________________________________________________
Stg4_Blk1_Res1_bn (BatchNormali (None, 12, 12, 128) 512 Stg4_Blk1_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg4_Blk1_Res1_relu (Activation (None, 12, 12, 128) 0 Stg4_Blk1_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg4_Blk1_Res2_conv (Conv2D) (None, 12, 12, 128) 147584 Stg4_Blk1_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg4_Blk1_lin_conv (Conv2D) (None, 12, 12, 128) 8320 dropout_2[0][0]
__________________________________________________________________________________________________
Stg4_Blk1_Res2_bn (BatchNormali (None, 12, 12, 128) 512 Stg4_Blk1_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg4_Blk1_add (Add) (None, 12, 12, 128) 0 Stg4_Blk1_lin_conv[0][0]
Stg4_Blk1_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg4_Blk1_relu (Activation) (None, 12, 12, 128) 0 Stg4_Blk1_add[0][0]
__________________________________________________________________________________________________
Stg4_Blk2_Res1_conv (Conv2D) (None, 12, 12, 128) 147584 Stg4_Blk1_relu[0][0]
__________________________________________________________________________________________________
Stg4_Blk2_Res1_bn (BatchNormali (None, 12, 12, 128) 512 Stg4_Blk2_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg4_Blk2_Res1_relu (Activation (None, 12, 12, 128) 0 Stg4_Blk2_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg4_Blk2_Res2_conv (Conv2D) (None, 12, 12, 128) 147584 Stg4_Blk2_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg4_Blk2_Res2_bn (BatchNormali (None, 12, 12, 128) 512 Stg4_Blk2_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg4_Blk2_add (Add) (None, 12, 12, 128) 0 Stg4_Blk1_relu[0][0]
Stg4_Blk2_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg4_Blk2_relu (Activation) (None, 12, 12, 128) 0 Stg4_Blk2_add[0][0]
__________________________________________________________________________________________________
Stg4_Blk3_Res1_conv (Conv2D) (None, 12, 12, 128) 147584 Stg4_Blk2_relu[0][0]
__________________________________________________________________________________________________
Stg4_Blk3_Res1_bn (BatchNormali (None, 12, 12, 128) 512 Stg4_Blk3_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg4_Blk3_Res1_relu (Activation (None, 12, 12, 128) 0 Stg4_Blk3_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg4_Blk3_Res2_conv (Conv2D) (None, 12, 12, 128) 147584 Stg4_Blk3_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg4_Blk3_Res2_bn (BatchNormali (None, 12, 12, 128) 512 Stg4_Blk3_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg4_Blk3_add (Add) (None, 12, 12, 128) 0 Stg4_Blk2_relu[0][0]
Stg4_Blk3_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg4_Blk3_relu (Activation) (None, 12, 12, 128) 0 Stg4_Blk3_add[0][0]
__________________________________________________________________________________________________
dropout_3 (Dropout) (None, 12, 12, 128) 0 Stg4_Blk3_relu[0][0]
__________________________________________________________________________________________________
Stg5_Blk1_Res1_conv (Conv2D) (None, 12, 12, 128) 147584 dropout_3[0][0]
__________________________________________________________________________________________________
Stg5_Blk1_Res1_bn (BatchNormali (None, 12, 12, 128) 512 Stg5_Blk1_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg5_Blk1_Res1_relu (Activation (None, 12, 12, 128) 0 Stg5_Blk1_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg5_Blk1_Res2_conv (Conv2D) (None, 12, 12, 128) 147584 Stg5_Blk1_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg5_Blk1_Res2_bn (BatchNormali (None, 12, 12, 128) 512 Stg5_Blk1_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg5_Blk1_add (Add) (None, 12, 12, 128) 0 dropout_3[0][0]
Stg5_Blk1_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg5_Blk1_relu (Activation) (None, 12, 12, 128) 0 Stg5_Blk1_add[0][0]
__________________________________________________________________________________________________
Stg5_Blk2_Res1_conv (Conv2D) (None, 12, 12, 128) 147584 Stg5_Blk1_relu[0][0]
__________________________________________________________________________________________________
Stg5_Blk2_Res1_bn (BatchNormali (None, 12, 12, 128) 512 Stg5_Blk2_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg5_Blk2_Res1_relu (Activation (None, 12, 12, 128) 0 Stg5_Blk2_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg5_Blk2_Res2_conv (Conv2D) (None, 12, 12, 128) 147584 Stg5_Blk2_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg5_Blk2_Res2_bn (BatchNormali (None, 12, 12, 128) 512 Stg5_Blk2_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg5_Blk2_add (Add) (None, 12, 12, 128) 0 Stg5_Blk1_relu[0][0]
Stg5_Blk2_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg5_Blk2_relu (Activation) (None, 12, 12, 128) 0 Stg5_Blk2_add[0][0]
__________________________________________________________________________________________________
Stg5_Blk3_Res1_conv (Conv2D) (None, 12, 12, 128) 147584 Stg5_Blk2_relu[0][0]
__________________________________________________________________________________________________
Stg5_Blk3_Res1_bn (BatchNormali (None, 12, 12, 128) 512 Stg5_Blk3_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg5_Blk3_Res1_relu (Activation (None, 12, 12, 128) 0 Stg5_Blk3_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg5_Blk3_Res2_conv (Conv2D) (None, 12, 12, 128) 147584 Stg5_Blk3_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg5_Blk3_Res2_bn (BatchNormali (None, 12, 12, 128) 512 Stg5_Blk3_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg5_Blk3_add (Add) (None, 12, 12, 128) 0 Stg5_Blk2_relu[0][0]
Stg5_Blk3_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg5_Blk3_relu (Activation) (None, 12, 12, 128) 0 Stg5_Blk3_add[0][0]
__________________________________________________________________________________________________
dropout_4 (Dropout) (None, 12, 12, 128) 0 Stg5_Blk3_relu[0][0]
__________________________________________________________________________________________________
Stg6_Blk1_Res1_conv (Conv2D) (None, 6, 6, 256) 295168 dropout_4[0][0]
__________________________________________________________________________________________________
Stg6_Blk1_Res1_bn (BatchNormali (None, 6, 6, 256) 1024 Stg6_Blk1_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg6_Blk1_Res1_relu (Activation (None, 6, 6, 256) 0 Stg6_Blk1_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg6_Blk1_Res2_conv (Conv2D) (None, 6, 6, 256) 590080 Stg6_Blk1_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg6_Blk1_lin_conv (Conv2D) (None, 6, 6, 256) 33024 dropout_4[0][0]
__________________________________________________________________________________________________
Stg6_Blk1_Res2_bn (BatchNormali (None, 6, 6, 256) 1024 Stg6_Blk1_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg6_Blk1_add (Add) (None, 6, 6, 256) 0 Stg6_Blk1_lin_conv[0][0]
Stg6_Blk1_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg6_Blk1_relu (Activation) (None, 6, 6, 256) 0 Stg6_Blk1_add[0][0]
__________________________________________________________________________________________________
Stg6_Blk2_Res1_conv (Conv2D) (None, 6, 6, 256) 590080 Stg6_Blk1_relu[0][0]
__________________________________________________________________________________________________
Stg6_Blk2_Res1_bn (BatchNormali (None, 6, 6, 256) 1024 Stg6_Blk2_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg6_Blk2_Res1_relu (Activation (None, 6, 6, 256) 0 Stg6_Blk2_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg6_Blk2_Res2_conv (Conv2D) (None, 6, 6, 256) 590080 Stg6_Blk2_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg6_Blk2_Res2_bn (BatchNormali (None, 6, 6, 256) 1024 Stg6_Blk2_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg6_Blk2_add (Add) (None, 6, 6, 256) 0 Stg6_Blk1_relu[0][0]
Stg6_Blk2_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg6_Blk2_relu (Activation) (None, 6, 6, 256) 0 Stg6_Blk2_add[0][0]
__________________________________________________________________________________________________
Stg6_Blk3_Res1_conv (Conv2D) (None, 6, 6, 256) 590080 Stg6_Blk2_relu[0][0]
__________________________________________________________________________________________________
Stg6_Blk3_Res1_bn (BatchNormali (None, 6, 6, 256) 1024 Stg6_Blk3_Res1_conv[0][0]
__________________________________________________________________________________________________
Stg6_Blk3_Res1_relu (Activation (None, 6, 6, 256) 0 Stg6_Blk3_Res1_bn[0][0]
__________________________________________________________________________________________________
Stg6_Blk3_Res2_conv (Conv2D) (None, 6, 6, 256) 590080 Stg6_Blk3_Res1_relu[0][0]
__________________________________________________________________________________________________
Stg6_Blk3_Res2_bn (BatchNormali (None, 6, 6, 256) 1024 Stg6_Blk3_Res2_conv[0][0]
__________________________________________________________________________________________________
Stg6_Blk3_add (Add) (None, 6, 6, 256) 0 Stg6_Blk2_relu[0][0]
Stg6_Blk3_Res2_bn[0][0]
__________________________________________________________________________________________________
Stg6_Blk3_relu (Activation) (None, 6, 6, 256) 0 Stg6_Blk3_add[0][0]
__________________________________________________________________________________________________
dropout_5 (Dropout) (None, 6, 6, 256) 0 Stg6_Blk3_relu[0][0]
__________________________________________________________________________________________________
AvgPool (AveragePooling2D) (None, 1, 1, 256) 0 dropout_5[0][0]
__________________________________________________________________________________________________
flatten (Flatten) (None, 256) 0 AvgPool[0][0]
__________________________________________________________________________________________________
dense (Dense) (None, 2) 514 flatten[0][0]
==================================================================================================
Total params: 5,270,786
Trainable params: 5,263,266
Non-trainable params: 7,520
__________________________________________________________________________________________________